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 APW7137
1MHz, High Efficiency, Step-Up Converter with Internal FET Switch
Features
* * * * * *
Wide 2.5V to 6V Input Voltage Range Built-in 0.6 N-Channel MOSFET Built-in Soft-Start High Efficiency up to 90% <1A Quiescent Current During Shutdown Current-Mode Operation - Stable with Ceramic Output Capacitors - Fast Transient Response
General Description
The APW7137 is a fixed switching frequency (1MHz typical), current-mode, step-up regulator with an integrated N-channel MOSFET. The device allows the usage of small inductors and output capacitors for portable devices. The current-mode control scheme provides fast transient response and good output voltage accuracy. The APW7137 includes under-voltage lockout, current limit, and over-temperature shutdown preventing damage in the event of an output overload.
100 90 80 VIN=5V
* * * *
Current-Limit Protection Over-Temperature Protection with Hysteresis Available in a Tiny 5-Pin SOT-23 Package (RoHS Compliant) Lead Free and Green Devices Available
Efcec, (%) fi i ny
70 60 50 40 30 20 VIN=3.3V
Applications
* * * *
Cell Phone and Smart Phone PDA, PMP, MP3 Digital Camera Boost Regulators
10 0 0.1 1 10
VOUT=12V 100 1000
Output Current, IOUT (mA)
Pin Configuration
Simplified Application Circuit
VIN
L1 10H 5 VIN 2 GND LX 1 R1 1.2M
VOUT 12V
C2 4.7F
LX 1 GND 2 FB 3
5 VIN 4 EN
5V
C1 4.7F
SOT-23-5 (Top View)
OFF
ON
4
APW7137
EN FB 3 R2 137k
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008 1 www.anpec.com.tw
APW7137
Ordering and Marking Information
APW7137 Assembly Material Handling Code Temperature Range Package Code APW7137 B :
W37X
Package Code B : SOT-23-5 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material L : Lead Free Device G : Halogen and Lead Free Device X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
Absolute Maximum Ratings
Symbol VIN VLX VEN TJ TSTG TSDR VIN Pin to GND LX Pin to GND EN Pin to GND Maximum Junction Temperature Storage Temperature Range
(Note 1)
Rating -0.3 to 7 -0.3 to 36 -0.3 to VIN 150 -65 to 150 260 Unit V V V C C C
Parameter
Maximum Lead Soldering Temperature, 10 Seconds
Note 1: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol JA Parameter Junction to Ambient Thermal Resistance
(Note 2)
Typical Value SOT-23-5 260
Unit C/W
Note 2: JA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of package is soldered directly on the PCB.
Recommended Operating Conditions
Symbol VIN VLX VOUT CIN COUT TA TJ VIN Input Voltage LX to GND Voltage Converter Output Voltage Input Capacitor Output Capacitor Ambient Temperature Junction Temperature Parameter
(Note 3)
Range 2.5 ~ 6 -0.3 ~ 32 VIN ~ 30 2.2 ~ 2.2 ~ -40 ~ 85 -40 ~ 125 Unit V V V F F C C
Note 3: Refer to the application circuit for further information Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008 2 www.anpec.com.tw
APW7137
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over VIN = 3.6V, IOUT = 0mA, TA = -40C to 85C, unless otherwise noted. Typical values are at TA = 25C. Symbol Parameter Test Conditions APW7137 Min. Typ. Max. Unit
SUPPLY VOLTAGE AND CURRENT VIN IDD ISD Input Voltage Range Input DC Bias Current TA = -40 ~ 85C, TJ = -40 ~ 125C VFB = 1.0V, switching EN = GND 2.5 1 0.1 6 2 1 V mA A V mV
UNDER-VOLTAGE LOCKOUT UVLO Threshold Voltage UVLO Hysteresis Voltage REFERENCE AND OUTPUT VOLTAGES VREF IFB FSW RON ILIM Regulated Feedback Voltage FB Input Current Switching Frequency Power Switch On Resistance Power Switch Current Limit LX Leakage Current DMAX TSS VTEN LX Maximum Duty Cycle Soft-Start Duration (Note 4) EN Voltage Threshold EN Voltage Hysteresis ILEN EN Leakage Current Over-Temperature Protection (Note 4) Over-Temperature Protection Hysteresis (Note 4) Note 4: Guaranteed by design, not production tested. VEN=5V, VIN = 5V VEN Rising VEN=0V, VLX=0V or 5V, VIN = 5V VFB=1.1V TA = 25C TA = -40 ~ 85C 1.212 1.205 -50 0.8 1 -1 92 0.4 -1 1.23 1.0 0.6 1.3 95 2 0.7 0.1 O .5 0 1.248 1.255 50 1.2 1.6 1 98 3 1 1 V nA MHz A A % ms V V A C C VIN Rising 2.0 50 2.2 100 2.4 150
INTERNAL POWER SWITCH
SOFT-START AND SHUTDOWN
OVER-TEMPERATURE PROTECTION TOTP TJ Rising 150 40 -
Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008
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APW7137
Typical Operating Characteristics
(Refer to Fig 1. in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, unless otherwise specified)
Switching Current vs. Supply Voltage
1.2 R eference V oltage, V REF (% ) 1 0.8 0.6 0.4 0.2 VFB=1.0V 0 2.5 3 3.5 4 4.5 5 5.5 6
Reference Voltage vs. Junction Temperature
1.28 1.27
Switching Current, ID (mA) D
1.26 1.25 1.24 1.23 1.22 1.21 1.20 1.19 1.18 -50 -25 0 25 50 75 100
J (C)
125
Supply Voltage, V (V) IN Switch ON Resistance vs. Junction temperature
0.9
100
Junction Temperature, T
Maximum Duty Cycle vs. Supply Voltage
M axim um D uty C ycle, D MAX (% )
Switch ON Resistance, R ON ([)
0.8 0.7 0.6 0.5 0.4 0.3 VIN=5V 0.2 -50 -25 0 25 50 75 100 125 VIN=3.6V VIN=2.7 V
90 80 70 60 50 40
2.5
3
3.5
4
4.5
5
5.5
6
Junction Temperature, T
J (C)
Supply Voltage, V
IN(V)
Switching Frequency vs. Supply Voltage
1.2
Switching Frequency vs. Junction Temperature
1.2
Switching Frequency, FS (MHz) W
3 3.5 4 4.5 5 5.5 6
Sw itching Frequency, F SW (M H z)
1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 2.5
1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 -50
-25
0
25
50
75
100
125
Supply Voltage, V
IN(V)
Junction Temperature, T
J (C)
Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008
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APW7137
Typical Operating Characteristics (Cont.)
(Refer to Fig 1. in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, unless otherwise specified)
Efficiency vs. Output Current
100 90 80 VIN=5V
Output Voltage vs. Output Current
12.20 12.15
Ot uVlaeVUV u t o g, O( ) pt T
Efficiency, (%)
70 60 50 40 30 20 10 0 0.1 1 10 100 1000 VOUT=12V VIN=3.3V
12.10 12.05 12.00 11.95 11.90 11.85 11.80 0.1
VIN=5V
VIN=3.3V
Output Current, I OUT (mA)
Output Current, I (mA) OUT
1
10
100
1000
Output Voltage vs. Supply Voltage
12.20 12.15
Output Voltage, V OUT(V)
12.10 12.05 12.00 11.95 11.90 11.85 11.80 2.5
3
3.5
4
4.5
5
5.5
6
Supply Voltage, V
IN(V)
Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008
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APW7137
Operating Waveforms
(Refer to Fig 1. in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, unless otherwise specified)
Start-up
VEN, 1V/Div, DC
Start-up
VEN, 1V/Div, DC
1
VOUT, 5V/Div, DC
1
VOUT, 5V/Div, DC
2
VIN=3.6V IOUT=1mA
IIN, 100mA/Div
2
IIN, 100mA/Div
3 Time: 0.5ms/Div
3 Time: 0.5ms/Div
VIN=3.6V IOUT=100mA
CH1: V , 1V/Div, DC EN CH2: V , 5V/Div, DC OUT CH3: IN 100mA/Div, DC I, Time: 0.5ms/Div
CH1: V , 1V/Div, DC EN CH2: V , 5V/Div, DC OUT CH3: IN 100mA/Div, DC I, Time: 0.5ms/Div
Normal Operation
VLX, 10V/Div
Normal Operation
VLX, 10V/Div
1 VOUT, 50mV/Div 2
1 VOUT, 50mV/Div 2 IL, 100mA/Div
IL, 100mA/Div VIN=3.3V IOUT=80mA
Time: 1s/Div 3
Time: 1s/Div 3
VIN=5V IOUT=80mA
CH1: LX10V/Div, DC V, CH2: OUT V , 50mV/Div, AC CH3:L 100mA/Div, DC ,I Time:s/Div 1
CH1: LX10V/Div, DC V, CH2: OUT V , 50mV/Div, AC CH3:L 100mA/Div, DC ,I Time:s/Div 1
Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008
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APW7137
Operating Waveforms (Cont.)
(Refer to Fig 1. in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, unless otherwise specified)
Load Transient Response
Load Transient Response
1
VOUT, 200mV/Div, AC
1
VOUT, 200mV/Div, AC
30mA 1mA
IOUT, 50mA/Div VIN=3.3V VOUT=12V
30mA
VIN=3.3V VOUT=12V 1mA IOUT, 50mA/Div Time: 0.5ms/Div
2
Time: 0.2ms/Div
2
CH1 , 200mV/Div, AC : OUT V CH2: 50mA/Div, DC ,I OUT Time: 0.2ms/Div
CH1: VOUT200mV/Div, AC , CH2: IOUT50mA/Div, DC , Time: 0.5ms/Div
Load Transient Response
Load Transient Response
1
VOUT, 200mV/Div, AC
VOUT, 200mV/Div, AC
1
30mA 1mA
IOUT, 50mA/Div VIN=5V VOUT=12V
30mA
VIN=5V VOUT=12V 1mA IOUT, 50mA/Div Time: 0.5ms/Div
2
Time: 0.2ms/Div
2
CH1 V , 200mV/Div, AC : OUT CH2:OUT I , 50mA/Div, DC Time: 0.2ms/Div
CH1: OUT V , 200mV/Div, AC CH2:OUT I , 50mA/Div, DC Time: 0.5ms/Div
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APW7137
Operating Waveforms (Cont.)
(Refer to Fig 1. in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, unless otherwise specified)
Load Transient Response
Load Transient Response
1
VOUT, 200mV/Div, AC
1
150mA
VOUT, 200mV/Div, AC
IOUT, 50mA/Div 150mA
30mA
30mA
VIN=3.3V VOUT=12V
IOUT, 50mA/Div
2
Time: 0.1ms/Div
2
Time: 0.1ms/Div
VIN=3.3V VOUT=12V
CH1 V , 200mV/Div, AC : OUT CH2:OUT I , 50mA/Div, DC Time: 0.1ms/Div
CH1 V , 200mV/Div, AC : OUT CH2:OUT I , 50mA/Div, DC Time: 0.1ms/Div
Load Transient Response
Load Transient Response
1
VOUT, 200mV/Div, AC
1
150mA
VOUT, 200mV/Div, AC
IOUT, 50mA/Div 150mA
30mA
30mA
IOUT, 50mA/Div
2
Time: 0.1ms/Div
VIN=5V VOUT=12V
2
Time: 0.1ms/Div
VIN=5V VOUT=12V
CH1 V , 200mV/Div, AC : OUT CH2:OUT I , 50mA/Div, DC Time: 0.1ms/Div
CH1 V , 200mV/Div, AC : OUT CH2:OUT I , 50mA/Div, DC Time: 0.1ms/Div
Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008
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APW7137
Operating Waveforms (Cont.)
(Refer to Fig 1. in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, unless otherwise specified)
Line Transient Response
Line Transient Response
VIN, 1V/Div, DC 5V 4V VOUT, 0.2V/Div, AC 2
VIN, 1V/Div, DC 4.2V 3.2V VOUT, 0.2V/Div, AC 2 1
1 Time: 0.2ms/Div
IOUT=40mA VOUT=12V
Time: 0.2ms/Div
IOUT=40mA VOUT=5V
CH1 V , 1V/Div, DC : IN CH2: OUT V , 0.2/Div, AC Time: 0.2ms/Div
CH1: IN 1V/Div, DC V , CH2: OUT V , 0.2/Div, AC Time: 0.2ms/Div
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APW7137
Pin Description
PIN. NO 1 2 3 NAME LX GND FB FUNCTION Switch pin. Connect this pin to inductor/diode here. Power and signal ground pin. Feedback Input. The device senses feedback voltage via FB and regulate the voltage at 1.23V. Connecting FB with a resistor-divider from the output that sets the output voltage in the range from VIN to 30V. Enable Control Input. Forcing this pin above 1.0V enables the device. Forcing this pin below 0.4V to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1A. Do not left this pin floating. Main Supply Pin. Must be closely decoupled to GND with a 2.2F or greater ceramic capacitor.
4 5
EN VIN
Block Diagram
VIN
EN
UVLO
Gate Driver
LX
Control Logic
Over-Temperature Protection Slop Compensation
Current Limit
Current Sense Amplifier
ICMP
Error Amplifier
Oscillator
GND
COMP EAMP VREF 1.23V
FB
Soft-Start
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APW7137
Typical Application Circuits
Fig 1. Typical 5V to 12V Supply
VIN 5V
C1 4.7F 5 VIN 2 ON OFF 4 GND L1 10H LX 1 R1 1.2M
VOUT 12V
C2 4.7F
APW7137
EN FB 3 R2 137k
Fig 2. Standard 3.3V to 5V Supply
VIN 3.3V
C1 4.7F 5 VIN 2 ON OFF 4 GND L1 4.7H LX 1 R1 430k
VOUT 5V
C2 10F
APW7137
EN FB 3 R2 140k
Fig 3. Brightness control using a PWM signal apply to EN
VIN
C1 4.7F L1 22H 5 VIN 2 100Hz~300Hz 4 Duty=100%, ILED=20mA Duty=0%, LED off GND LX 1 C2 1F
VOUT
Up to 8 WLEDs
APW7137
EN FB 3 R1 62
Fig 4. Multiple Output for TFT-LCD Power Supply
+13V C6 0.47F +9V C4 0.47F C5 0.1F C3 0.1F C9 0.1F C7 0.1F -4V C8 0.47F L1 4.7H C1 4.7F 5 VIN 2 ON OFF 4 GND LX 1 R1 430k C2 10F -8V C10 0.47F
VIN
VOUT 5V
APW7137
EN FB 3 R2 140k
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APW7137
Function Description
Main Control Loop The APW7137 is a constant frequency and current-mode switching regulator. In normal operation, the internal Nchannel power MOSFET is turned on each cycle when the oscillator sets an internal RS latch, and then turned off when an internal comparator (ICMP) resets the latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the COMP node which is the output of the error amplifier (EAMP). An external resistive divider connected between VOUT and ground allows the EAMP to receive an output feedback voltage VFB at FB pin. When the load current increases, it causes a slightly to decrease in VFB associated with the 1.23V reference, which in turn, it causes the COMP voltage to increase until the average inductor current matches the new load current. VIN Under-Voltage Lockout (UVLO) The Under-Voltage Lockout (UVLO) circuit compares the input voltage at VIN with the UVLO threshold to ensure the input voltage is high enough for reliable operation. The 100mV (typ) hysteresis prevents supply transients from causing a restart. Once the input voltage exceeds the UVLO rising threshold, startup begins. When the input voltage falls below the UVLO falling threshold, the controller turns off the converter. Soft-Start The APW7137 has a built-in soft-start to control the output voltage rise during start-up. During soft-start, an internal ramp voltage, connected to the one of the positive inputs of the error amplifier, raises up to replace the reference voltage (1.23V typical) until the ramp voltage reaches the reference voltage. Current-Limit Protection The APW7137 monitors the inductor current, flows through the N-channel MOSFET, and limits the current peak at current-limit level to prevent loads and the APW7137 from damaging during overload or short-circuit conditions. Over-Temperature Protection (OTP) The over-temperature circuit limits the junction temperature of the APW7137. When the junction temperature exceeds 150 oC, a thermal sensor turns off the power MOSFET allowing the devices to cool. The thermal sensor allows the converters to start a soft-start process and regulates the output voltage again after the junction temperature cools by 40oC. The OTP is designed with a 40oC hysteresis to lower the average Junction Temperature (TJ) during continuous thermal overload conditions increasing the lifetime of the device. Enable/Shutdown Driving EN to the ground places the APW7137 in shutdown mode. When in shutdown, the internal power MOSFET turns off, all internal circuitry shuts down, and the quiescent supply current reduces to 1A maximum.
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APW7137
Application Information
Input Capacitor Selection The input capacitor (CIN) reduces the ripple of the input current drawn from the input supply and reduces noise injection into the IC. The reflected ripple voltage will be smaller when an input capacitor with larger capacitance is used. For reliable operation, it is recommended to select the capacitor with maximum voltage rating at least 1.2 times of the maximum input voltage. The capacitors should be placed close to the VIN and the GND. Inductor Selection Selecting an inductor with low dc resistance reduces conduction losses and achieves high efficiency. The efficiency is moderated whilst using small chip inductor which operates with higher inductor core losses. Therefore, it is necessary to take further consideration while choosing an adequate inductor. Mainly, the inductor value determines the inductor ripple current: larger inductor value results in smaller inductor ripple current and lower conduction losses of the converter. However, larger inductor value generates slower load transient response. A reasonable design rule is to set the ripple current, IL, to be 30% to 50% of the maximum average inductor current, IL(AVG). The inductor value can be obtained as below,
V L IN V OUT VOUT - VIN x x F I IL SW OUT (MAX ) IL (AVG )
2
The peak inductor current is calculated as the following equation: IPEAK = IIN(MAX ) +
IL
1 VIN (VOUT - VIN ) 2 VOUT L FSW
LX D1 IOUT VOUT
VIN
IIN
CIN
N-FET
ISW
ESR COUT
IL ILIM IPEAK IL IIN ISW
ID IOUT
Output Capacitor Selection The current-mode control scheme of the APW7137 allows the usage of tiny ceramic capacitors. The higher capacitor value provides good load transients response. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. If required, tantalum capacitors may be used as well. The output ripple is the sum of the voltages across the ESR and the ideal output capacitor. GVOUT = GVESR + GVCOUT VCOUT IOUT COUT V - VIN OUT V OUT FSW
where VIN = input voltage VOUT = output voltage FSW = switching frequency in MHz IOUT = maximum output current in amp. b = Efficiency IL /IL(AVG) = inductor ripple current/average current (0.3 to 0.5 typical) To avoid the saturation of the inductor, the inductor should be rated at least for the maximum input current of the converter plus the inductor ripple current. The maximum input current is calculated as below:
IIN(MAX ) = IOUT (MAX ) VOUT VIN
VESR IPEAK RESR where IPEAK is the peak inductor current.
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APW7137
Application Information (Cont.)
Output Capacitor Selection (Cont.) For ceramic capacitor application, the output voltage ripple is dominated by the VCOUT. When choosing the input and output ceramic capacitors, the X5R or X7R with their good t e m p e r a t u r e an d v o l t a g e c h a r ac t e r i s t i c s a r e recommended.
R1 VOUT D1 LX C2 C1 R2 VEN L1 VIN
Output Voltage Setting The output voltage is set by a resistive divider. The external resistive divider is connected to the output which allows remote voltage sensing as shown in "Typical Application Circuits". A suggestion of the maximum value of R1 is 2M and R2 is 200k for keeping the minimum current that provides enough noise rejection ability through the resistor divider. The output voltage can be calculated as below:
R1 R1 VOUT = VREF 1 + = 1.23 1 + R2 R2
Optimized APW7137 Layout
Diode Selection To achieve the high efficiency, a Schottky diode must be used. The current rating of the diode must meet the peak current rating of the converter. Layout Consideration For all switching power supplies, the layout is an important step in the design especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. 1. The input capacitor should be placed close to the VIN and the GND without any via holes for good input voltage filtering. 2. To minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the LX pin to minimize the noise coupling into other circuits. 3. Since the feedback pin and network is a high impedance circuit the feedback network should be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground plane or trace to minimize noise coupling into this circuit. 4. A star ground connection or ground plane minimizes ground shifts and noise is recommended.
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APW7137
Package Information
SOT-23-5
D e
SEE VIEW A
E1
b e1
E
c
0.25
GAUGE PLANE SEATING PLANE VIEW A SOT-23-5 INCHES MIN. MAX. 0.057 0.000 0.035 0.012 0.003 0.106 0.102 0.055 0.037 BSC 0.075 BSC 0.60 8 0.012 0 0.024 8 0.006 0.051 0.020 0.009 0.122 0.118 0.071 MAX. 1.45 0.15 1.30 0.50 0.22 3.10 3.00 1.80
A2 A1
A
S Y M B O L A A1 A2 b c D E E1 e e1 L 0
MILLIMETERS MIN.
0.00 0.90 0.30 0.08 2.70 2.60 1.40 0.95 BSC 1.90 BSC 0.30 0
Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.
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0
L
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APW7137
Carrier Tape & Reel Dimensions
P0 P2 P1
OD0
A E1 F
K0 B SECTION A-A
B0
A0
OD1 B
A
SECTION B-B
T
d
Application
A 178.0O .00 2
H 50 MIN. P1 4.0O .10 0
H A
T1
T1 8.4+2.00 -0.00 P2 2.0O .05 0
C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00
d 1.5 MIN. D1 1.0 MIN.
D 20.2 MIN. T 0.6+0.00 -0.40
W 8.0O .30 0 A0 3.20O .20 0
W
E1 1.75O .10 0 B0 3.10O .20 0
F 3.5O .05 0 K0 1.50O .20 0 (mm)
SOT-23-5
P0 4.0O .10 0
Devices Per Unit
Package Type SOT-23-5 Unit Tape & Reel Quantity 3000
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APW7137
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone TL to TP Ramp-up
TL
Temperature
tL Tsmax
Tsmin Ramp-down ts Preheat
25
t 25C to Peak
Time
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78
17
Description 245C, 5 sec 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA
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APW7137
Classification Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5C of actual Peak Temperature (tp) Ramp-down Rate Time 25C to Peak Temperature Sn-Pb Eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds See table 1 10-30 seconds 6C/second max. 6 minutes max. Pb-Free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds See table 2 20-40 seconds 6C/second max. 8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface. Table 1. SnPb Eutectic Process - Package Peak Reflow Temperatures Package Thickness <2.5 mm 2.5 mm
3 3
Volume mm <350
Volume mm 350
3
240 +0/-5C 225 +0/-5C
225 +0/-5C 225 +0/-5C
Table 2. Pb-free Process - Package Classification Reflow Temperatures Package Thickness Volume mm <350 Volume mm 350-2000
3
Volume mm >2000
3
<1.6 mm 260 +0C* 260 +0C* 260 +0C* 1.6 mm - 2.5 mm 260 +0C* 250 +0C* 245 +0C* 2.5 mm 250 +0C* 245 +0C* 245 +0C* * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0C. For example 260C+0C) at the rated MSL level.
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838
Copyright (c) ANPEC Electronics Corp. Rev. A.4 - Oct., 2008
18
www.anpec.com.tw


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